Conductive lines are desired to be formed with fine patterning for high integration density. The desired widths of the conductive lines may be smaller than the range of resolution that can be realized using a photolithographic process.
Thus, a technique is desired for fabricating highly integrated circuit structures using existing photolithographic processes but with dimensions smaller than can be realized using conventional photolithographic processes alone. In particular, conductive lines having such small dimensions are desired to be formed for fabricating highly integrated circuit structures.